In order to increase a capacity of a flash memory, a three-dimensional NAND flash memory where a plurality of memory cells are three-dimensionally arranged may be provided. In order to further increase the capacity of the three-dimensional NAND flash memory, it may be desirable to reduce a size of the memory cell. For example, it is possible to reduce the size of the memory cell by using a thin gate insulating layer of the memory cell provided between a semiconductor layer and a gate electrode.
In a memory cell of a metal oxide nitride oxide semiconductor (MONOS) type, for example, a stacked structure of an oxide tunnel insulating film, a nitride charge storage film, and an oxide block insulating film may be used in a gate insulating layer. From a viewpoint of accumulating a desired charge, the charge storage may be designed to have a film thickness equal to or greater than a certain value. In addition, from a viewpoint of preventing an escape of the charge from the charge storage film, the tunnel insulating film and the block insulating film may be designed to have a film thickness equal to or greater than a certain value. Therefore, in the memory cell of the MONOS type, it can be challenging to implement a thin gate insulating layer.